Integrated circuits are often formed using an application specific integrated circuit architecture, which tends to reduce the design costs of the integrated circuit by using predetermined logic blocks in a somewhat customized arrangement to produce an integrated circuit according to a customer's specifications. One aspect of such a customizable integrated circuit design is referred to as reconfigurable random access memory, or RRAM. RRAM contains sets of memories that are placed compactly within a memory matrix.
As the term is used herein, “integrated circuit” includes devices such as those formed on monolithic semiconducting substrates, such as those formed of group IV materials like silicon or germanium, or group III-V compounds like gallium arsenide, or mixtures of such materials. The term includes all types of devices formed, such as memory and logic, and all designs of such devices, such as MOS and bipolar. The term also comprehends applications such as flat panel displays, solar cells, and charge coupled devices.
Testing of embedded memories is one of the most difficult stages of digital system testing. The known design methodologies require the insertion of a separate test controller (such as the memory test controller made by LogicVision, Inc. of San Jose, Calif.) for every embedded memory. This approach is unacceptable for memory matrix testing. Memory matrices contain up to several hundreds memories. It is highly undesirable to increase the matrix size by including hundreds of memory test controllers into the matrix.
There are two main types of digital system testing: production testing and diagnostic testing. Production testing is used to make sure that there are no defects in the integrated circuit. The test result for every memory is just one bit: passed/failed. Every chip must pass all production tests before it is delivered to the customer. Therefore, it is desirable to minimize the overall time that is required by the production testing. When all the memories inside the memory matrix are tested in a standard mode, then the total matrix test time tends to be unacceptably long.
Diagnostic testing can be used to detect the exact position of a defect in a memory. If a production test fails on a memory, then it is desirable to run a diagnostic test on the failed memory to determine exactly which ports or addresses of the memory are defective. Decoding the results of the diagnostic test typically requires analyzing the values output by the memory during the test.
What is needed, therefore, is a built in self test system for matrix memories that overcomes problems such as those described above, at least in part.